BS IEC 63011-1:2018 Integrated circuits. Three dimensional integrated circuits. Terminology

BS IEC 63011-1:2018

Integrated circuits. Three dimensional integrated circuits. Terminology

Status : Current   Published : January 2019

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What is this standard about?

This part of IEC 63011 provides definitions pertaining to multichip integrated circuits, as vertically stacked dies using through-silicon vias (TSVs) or micro bumps. Terms and definitions related to the fabrication and test of the multichip integrated circuits are also provided.




Standard NumberBS IEC 63011-1:2018
TitleIntegrated circuits. Three dimensional integrated circuits. Terminology
StatusCurrent
Publication Date24 January 2019
Normative References(Required to achieve compliance to this standard)No other standards are normatively referenced
Informative References(Provided for Information)IEC 60050-411:1996, IEC 60050-161:1990, IEC 60050-131:2002, IEC 60050-713, IEC 63011-2, IEC 63011-3, IEC 60050-714
International RelationshipsIEC 63011-1:2018
Draft Superseded By18/30350966 DC
DescriptorsTransient voltages, Integrated circuits, Semiconductors, Impulse voltages, Electronic equipment and components, Electromagnetic compatibility, Test equipment, Electrical measurement, Impulse-voltage tests
ICS31.200
Title in FrenchCircuits intégrés. Circuits intégrés tridimensionnels Terminologie
CommitteeEPL/47
ISBN978 0 580 96278 3
PublisherBSI
FormatA4
DeliveryYes
Pages16
File Size986 KB
Price£130.00


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