IEC 61691-6:2009 - Behavioural languages. Part 6: VHDL Analog and Mixed-Signal Extensions

IEC 61691-6:2009

Behavioural languages. Part 6: VHDL Analog and Mixed-Signal Extensions

Status : Current   Published : December 2009

Format
PDF

Format
HARDCOPY



IEC 61691-6:2009(E) Defines IEC 61691-6/IEEE Std 1076.1 language, a hardware description language for the description and the simulation of analog, digital, and mixed-signal systems. The language, also informally known as VHDLAMS, is built on the IEC 61691-1-1/IEEE 1076 (VHDL) language and extends it to provide capabilities of writing and simulating analog and mixed-signal models.




Standard NumberIEC 61691-6:2009
TitleBehavioural languages. Part 6: VHDL Analog and Mixed-Signal Extensions
Titles in this kitNo Description 000000000030214459 No Descripti

StatusCurrent
Publication Date01 December 2009
Normative References(Required to achieve compliance to this standard)No other standards are normatively referenced
Informative References(Provided for Information)No other standards are informatively referenced
ICS25.040.01
35.060
CommitteeEPL/501
ISBN2-8318-1069-0
PublisherIEC
FormatA4
DeliveryYes
Pages346
File Size4.771 MB
Price£280.00


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