BS EN 60191-6-6:2001, IEC 60191-6-6:2001 - Mechanical standardization of semiconductor devices. General rules for the preparation of outline drawings of surface mounted semiconductor device packages. Design guide for fine pitch land grid array (FLGA). Proposed amendment on terminology
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BS EN 60191-6-6:2001, IEC 60191-6-6:2001

Mechanical standardization of semiconductor devices. General rules for the preparation of outline drawings of surface mounted semiconductor device packages. Design guide for fine pitch land grid array (FLGA). Proposed amendment on terminology

Status : Current   Published : September 2001

Format
PDF

Format
HARDCOPY



IEC 60191-6-6:2001 provides common outline drawings and dimensions for all types of structures and composed materials of fine-pitch land grid array (hereinafter called FLGA) whose terminal pitch is less than, or equal to, 0,80 mm and whose package body outline is square.




Standard NumberBS EN 60191-6-6:2001, IEC 60191-6-6:2001
TitleMechanical standardization of semiconductor devices. General rules for the preparation of outline drawings of surface mounted semiconductor device packages. Design guide for fine pitch land grid array (FLGA). Proposed amendment on terminology
StatusCurrent
Publication Date05 September 2001
Normative References(Required to achieve compliance to this standard)No other standards are normatively referenced
Informative References(Provided for Information)No other standards are informatively referenced
International RelationshipsEN 60191-6-6:2001,IEC 60191-6-6:2001
DescriptorsElectronic equipment and components, Engineering drawings, Graphic representation, Drawings, Dimensions, Design, Semiconductor devices, Standardization, Integrated circuits, Surface mounting devices
ICS01.100.25
31.080.01
Title in FrenchNormalisation mecanique des dispositifs a semi-conducteurs. Regles generales pour la preparation des dessins d'encombrement des dispositifs a semiconducteurs pour montage en surface. Guide de conception des dispositifs FLGA
Title in GermanMechanische Normung von Halbleiterbauelementen. Allgemeine Regeln fuer die Erstellung von Gehaeusezeichnungen von SMD-Halbleitergehaeusen. Konstruktionsleitfaden fuer Feinraster- Land-Grid-Array (FLGA)
CommitteeEPL/47
ISBN0 580 38393 8
PublisherBSI
FormatA4
DeliveryYes
Pages16
File Size434 KB
Price£134.00


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